This work targets the optimization of multi-processor H.264 decoder implementations. We have extended the simulator of a multi-core VLIW media processor to enable cycle-accurate function profiling on a sub-macroblock level, which allows measuring the effects of coding modes on the computational complexity with very fine granularity. This knowledge helps the system designer to optimize the system performance and memory sizes to reduce system costs.
F. Seitner, R. Schreier, M. Bleyer, M. Gelautz: "A Macroblock-level Analysis on the Dynamic Behaviour of an H.264 Decoder"; Talk: ISCE 2007, Dallas; 06-20-2007 - 06-23-2007; in: "Proceedings of ISCE 2007", IEEE, (2007), 1 - 5.
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